The present invention relates to a process for producing a semiconductor device having a highly reliable trench isolation structure and a semiconductor device produced thereby.
An STI (shallow trench isolation) structure [or an SGI (shallow groove isolation) structure] is now available to make an electrical isolation between adjacent elements such as transistors, etc. on a semiconductor substrate. As shown in FIGS. 6A-6D, the STI structure typically comprises a shallow trench formed on a silicon substrate 1 and an oxide film embedded in the trench; and is suitable for devices of up to 0.25 xcexcm process technologies, because its processing dimensional precision is higher than that of the so-far-used LOCOS structure.
That is, a pad oxide film 2 is formed on the surface of a silicon substrate 1 by thermal oxidation, and an oxidation prevention film 3 is deposited on the pad oxide film 2. Then, a shallow trench is formed in the silicon substrate 1 (FIGS. 6A and 6B). Then, an element-isolating, thermally oxidized film 5 is formed in the trench of the silicon substrate 1 (FIG. 6C). Then, an isolation film 6 is formed thereon and filled in the trench (FIG. 6D).
However, the trench of the STI structure is formed by anisotropic dry etching (FIG. 6B), whereby corners A are formed at the upper trench edges. When further oxidized as such, the upper trench edges of the Si substrate are sometimes shaped into sharp corners 4 as shown in FIG. 6C.
The presence of such sharp corners 4 at the upper trench edges in the substrate 1 gives rise to an electric field concentration or a stress concentration, sometimes resulting in abnormal electrical characteristics of transistors.
To solve such problems, for example, A. Chatterjee, et al propose a process for rounding the upper trench edges in a substrate to a desired curvature (Technical Digest of IEDM ""96, pp. 829-832). FIGS. 7A-7E show the process for giving a curvature to the upper trench edges in the substrate.
A resist 13, a TEOS film 15 and an oxidation prevention film 3 are patterned (FIG. 7A), and a LOCOS film 12 is then formed by oxidation (FIG. 7B). The LOCOS film 12 is then removed and an TEOS film 15 (an oxide film) is formed as a mask on the sides of the oxidation prevention film 3 (FIG. 7C) and a trench is formed (FIG. 7D). Then, the trench is oxidized to give a curvature to the upper trench edges of STI (FIG. 7E).
However, the process for giving a curvature to the upper trench edges in substrate requires two runs of oxidation (FIGS. 7B and 7E) and one run of film deposition (FIG. 7C) to obtain a substrate profile with a curvature at such upper trench edges, resulting in a complication of process steps.
An object of the present invention is to provide a simplified process for producing a semiconductor device with round upper trench edges of a curvature and a semiconductor device produced thereby.
The present invention provides a process for producing a semiconductor device, which comprises:
(a) a step of forming a pad oxide film on the circuit-forming side of a semiconductor substrate,
(b) a step of forming an oxidation prevention film on the pad oxide film,
(c) a step of removing the oxidation prevention film and the pad oxide film at a desired position, thereby exposing the surface of the semiconductor substrate,
(d) a step of horizontally recessing the pad oxide film,
(e) a step of etching the exposed surface of the semiconductor substrate by isotropic etching,
(f) a step of forming a trench to a desired depth, using the oxidation prevention film as a mask,
(g) a step of horizontally recessing the pad oxide film,
(h) a step of oxidizing the trench formed in the semiconductor substrate,
(i) a step of embedding an embedding isolation film in the oxidized trench,
(j) a step of removing the embedding isolation film formed on the oxidation prevention film,
(k) a step of removing the oxidation prevention film formed on the circuit-forming side of the semiconductor substrate, and
(l) a step of removing the pad oxide film formed on the circuit-forming side of the semiconductor substrate.
The present invention also provides a semiconductor device produced according to the aforementioned process.